1. Field of the Invention
Example embodiments of the present invention relate generally to a semiconductor package and a method of manufacturing the same, and more particularly, to a printed circuit board (PCB) used in the semiconductor package, a semiconductor package using the PCB, and a method of manufacturing the same.
2. Description of the Related Art
In general, a semiconductor package may include a substrate, a semiconductor chip attached on a surface of the substrate, and a conductive member, such as a solder ball attached on an opposite surface of the substrate. In a conventional semiconductor package, the semiconductor chip and the solder ball may be attached on one surface of the substrate.
A printed circuit board (PCB) may be used as the substrate for the semiconductor package. The PCB may include a main body, on which one or more supporting layers may be stacked, a metal wire formed on each of the supporting layers to penetrate the layers, and an outermost resin layer pattern. The supporting layer may be an insulating layer formed of, for example a glass-fiber resin. In addition, the metal wire may be formed of a conductive material, such as copper (Cu), and may electrically connect the semiconductor chip and the solder ball in the semiconductor package. The outermost resin layer pattern may be formed of a material, such as a photo solder resist (PSR) to seal the metal wire formed on the surface of the main body so as not to expose the wire in an atmosphere. However, some of the metal wires formed on the surface of the main body may be exposed by a plurality of openings formed in the outermost resin layer pattern. The exposed metal wires may function as an outer connection terminal that may be electrically connected to the semiconductor chip and/or the solder ball. In addition, a plating layer, made from, for example, nickel/gold (Ni/Au) may be further formed on the exposed surface of the outer connection terminal.
However, the outermost resin layer pattern of the PCB may not have a good adhesion to the metal wire, especially with copper wire. If the adhesion between the outermost resin layer and the copper wire is not good, the outermost resin pattern may be detached and a gap can be generated on an interface therebetween. Moreover, cracks may be generated on the outermost resin layer pattern and/or copper wire when the semiconductor chip is attached onto the PCB by pressure. These problems may degrade the life span of the semiconductor package and reliability thereof.
Further, in the conventional art, a portion of the surface of the copper wire may be etched by using chemicals to increase the roughness of the surface of the copper wire (e.g., increase surface area of the copper wire) so as to improve the adhesive force. In other words, the contacting area between the outermost resin layer pattern and the copper wire may need to increase so as to produce an increase adhesive force therebetween. However, increasing the surface area between the copper wire and the outermost resin layer pattern has produced a limit in the amount of adhesive force.